ph3Analog IC Design Engineer – SerDes, High Speed, PLL /h3 pI am recruiting for a Senior Analog IC Design Engineer for my client near Milan, a company developing high-speed data communication silicon using advanced CMOS process technologies. /p pAs a Senior Analog IC Design Engineer, you will play a key role in defining and delivering critical SerDes and clocking IP used in power-efficient interconnect solutions. The Senior Analog IC Design Engineer will work closely with digital, layout and verification engineers through the full development cycle. /p h3Responsibilities /h3 ul liDefine, analyse and refine SerDes architectures in collaboration with the wider engineering group /li liDesign key analog IP blocks such as PLLs, DLLs, amplifiers, samplers and equalisation circuits /li liDevelop supporting analog functions including bias circuits, regulators,



ADCs and DACs /li liLead verification planning and support silicon bring-up through to release /li /ul h3Requirements /h3 ul li5+ years of relevant industry experience with a suitable technical degree /li liStrong hands on experience in SerDes design in advanced FinFET CMOS nodes /li liConfident use of industry standard EDA tools including Cadence, Spectre and Calibre /li liSolid grounding in analog IC design with good understanding of signal integrity and power integrity /li /ul pThis opportunity suits a Senior Analog IC Design Engineer looking for challenging high-speed design work. /p /p #J-18808-Ljbffr

📌 Analog IC Design Engineer – SerDes, High Speed, PLL (Turbigo)
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