Overview As Staff System Architecture Engineer, you shape next‐generation SerDes DSP architectures for 100G+ per lane data rates within Marvell's R&D; efforts. You collaborate across analog, digital, and firmware teams to define performance goals and drive implementation‐ready designs. You will model and simulate DSP algorithms for mixed‐signal systems and contribute to optical channel R&D.; This role blends cutting‐edge technology with cross‐functional teamwork to advance AI and datacenter bandwidth. Responsibilities * Design and simulate DSP architectures; define key capabilities and performance requirements for analog and digital designers * Develop and simulate DSP algorithms and behavioral models for mixed‐signal systems * Perform R&D; in digital signal processing for SerDes and optical channels * Collaborate with designers to ensure architecture can be efficiently implemented * Join cross‐functional bring‐up and validation/optimization activities with analog, digital, and firmware teams Qualifications * Master in Electrical Engineering (or related field) * 2-5 years of DSP architecture and algorithm development (preferred) * Deep understanding of digital communication and signal processing theory * Strong experience in communication system modeling and simulation * Good knowledge of optical communication systems (a plus) * Experience in high-speed DSP and Clock and Data Recovery (CDR) (a plus) * Programming skills in Matlab/Python/C/C++ * Understanding of digital implementation of DSP (a plus) * Team player with willingness to tackle diverse projects #J-18808-Ljbffr

📌 DSP Architecture Engineer (Italia)
🏢 Experteer Italy
📍 Italia