Experteer Overview Pronto/a a candidarsi? La preghiamo di leggere la descrizione almeno una volta prima di fare clic su "Candidati". In this role you lead mixed signal verification for complex SOCs at NXP's new Catania team, shaping high-quality edge processing products. You work with global design groups to define verification strategy and ensure traceability from requirements to tape‐out. You create functional models with System Verilog and AMS models to validate electrical behavior, driving coverage and post‐silicon support. You contribute to delivering robust devices from A0 silicon to production, aligning with NXP's pace and quality standards.



Retribuzione / Benefits Develop SOC verification strategies with global design teams Create verification plans and ensure requirements traceability Develop functional models of analog blocks using System Verilog for SOC verification Create AMS models of analog blocks and sub‐systems Run simulations and track verification coverage Support high‐quality tape‐outs and post‐silicon debugging to meet performance/reliability goals Responsabilità xrdztoy Bachelor in Electronic Engineering 5+ years of production mixed signal verification System Verilog modeling experience Assertion, checkers, and digital verification experience (highly desired) Ability to visually inspect analog and digital blocks Strong communication and teamwork skills #J-18808-Ljbffr

📌 Senior Mixed Signal Verification Engineer (Italia)
🏢 Altro
📍 Italia