Job Overview
Allegro MicroSystems invites a motivated electronic engineering student to join our design team to pioneer a new IP for Isolated Gate Drivers as part of their Master's Thesis research. This unique opportunity allows you to apply your academic knowledge in a high?impact, professional power electronics IC design environment.
Key Responsibilities
Design, simulate, and develop innovative IP for the isolated gate driver portfolio, directly impacting design efficiency and accelerating next?generation high?voltage power products.
What You Will Gain
Hands?On Experience – Apply your academic knowledge to a tangible, high?impact project in a professional power electronics IC design environment.
Expert Mentorship – Receive dedicated guidance and support from senior design and technology experts.
Advanced Tooling – Gain proficiency with industry?standard EDA tools (Cadence Virtuoso, Spectre) and behavioral modeling.




Professional Development – Enhance your skills in problem?solving, teamwork, and working within a global technology leader.
Networking – Build valuable connections within Allegro and the broader semiconductor industry.
Required Skills and Experience
Pursuing a Master's degree in Electronic Engineering with a focus on Analog/Mixed?Signal IC Design or Power Electronics.
Strong academic foundation in analog circuit design and power semiconductor devices (MOSFETs, IGBTs, SiC/GaN).
Familiarity with simulation tools (Cadence Virtuoso/Spectre, SPICE, or MATLAB/Simulink).
Familiarity with the Linux environment.
Proficiency in written and spoken English.
A proactive, collaborative mindset with a passion for innovation.
Duration
6 months (Paid Internship)
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📌 Analog Design Engineer Intern - Master'S Thesis (Milano)
🏢 Allegro MicroSystems
📍 Milano