Power IP Development
Contribute to the definition and the design of complex Power IPs.
Power Management IC Development
Execute on PMIC design, pre-silicon verification and post-silicon validation;
Provide guidance to physical design layout team.
Technical Customer Interface Engagement
Participate in customer engagements, in support of technical feasibility;
IC Development Weekly meetings/IC Milestone Workshops.
Human Resources
Enable a culture of continuous learning and improvement;
Support project management, task planning and schedule.
Minimum Qualifications & Experience:
Degree in Electrical Engineering, Computer Science, or Computer Engineering, with 3+ years of experience;
IP Analog Design experience;
Solid technical and analytical background, with good problem-solving skills;
Good team worker with multi-discipline;




Good understanding of Mixed-Signal Design Flow and Top-Down development methodology;
Good understanding of Power IP Topologies;
Analog Functional and Parametric Verification;
Process - Voltage - Temperature (PVT) Corners, Layout Parameter Extraction (LPE) Simulations;
Good written and verbal communication.
Preferred Qualifications & Experience:
Proficient with Cadence Suite (Virtuoso ADE Spectre);
Scripting languages;
HDL programming languages (Verilog / System Verilog);
Analog Behavioral Models (Verilog-A, Verilog-AMS, Wreal, SystemVerilog, EEnet);
Mixed-Signal Verification methodology and tools (AMS/APS/Flex);
Experience in high-voltage low geometry process technology;
Lab silicon bring-up and Production Test support experiences.

📌 Senior Engineer, Analog Design Engineering (Milano)
🏢 Adi - Analog Devices
📍 Milano