pIn this role you will drive digital design for FPGA-based prototypes and ASIC readiness, collaborating with cross-functional teams to translate RTL into silicon.
You will shape architectures, verify complex blocks, and ensure timing, area, and power targets across the product lifecycle.
The position offers exposure to cutting-edge FPGA/ASIC methodologies and interaction with customers and stakeholders, contributing to high-impact silicon solutions for embedded systems.
/pulliFPGA prototyping and HDL-based design /liliDeveloping models and self-checking mechanisms for FPGA /liliHW SW co-design and architectural block specification /liliVerilog/SystemVerilog RTL design with emphasis on AXI/AHB and ARM cores /liliDefine timing constraints and perform static timing analysis /liliCoordinate with verification, analog, and implementation teams to bring RTL to silicon /liliInteract with customers and stakeholders to align on functionality and protocols /liliDesign to meet targets for timing, area, low-power,



manufacturing test and timing /liliIP block design and integration; mixed-signal verification and co-simulation /liliVerify blocks using UVM and support product roadmap alignment /liliBachelor's in Electronic Engineering or equivalent; Master's may be preferred /liliArchitectural design of complex SOCs with processors /liliDeep knowledge of FPGA development flow and FPGA modelling /liliVerilog/SystemVerilog RTL design with emphasis on AXI/AHB and ARM cores /liliExperience with timing, area, low-power, DFT, and manufacturing test constraints /liliAbility to work with verification and analog teams; cross-functional collaboration /liliStrong interpersonal, teamwork, and communication skills; precise documentation /liliSelf-motivation, enthusiasm, and quick adoption of new technologies /liliProven problem-solving skills and ability to work in diverse teams /liliExperience with RTL-to-silicon flow and interaction with implementation teams /li /ulIn this role you will drive digital design for FPGA-based prototypes and ASIC readiness, collaborating with cross-functional teams to transl... #J-*****-Ljbffr

📌 Senior Engineer, Digital Design Engineering (Catania)
🏢 Experteer Italy
📍 Catania