Analog Layout Principal Engineer (Italia)

Analog Layout Principal Engineer (Italia)

04 ago
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Altro
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Italia

04 ago

Altro

Italia

Experteer OverviewAs a Principal analog custom layout engineer at Marvell, you will shape high-speed connectivity and analog/mixed-signal blocks for advanced CMOS processes. You will lead layout work that translates schematics into manufacturable blocks, partnering with circuit design and PV teams to ensure performance and reliability. You'll influence both the design and production process, guiding cross-functional collaboration across global teams. This role offers the chance to impact cutting-edge data-transport technologies within a culture that values collaboration and continuous learning.
Responsibilities Layout drawing for schematics using industry CAD tools in deep sub-micron FinFET tech
Communicate requirements clearly to Design Engineers and translate schematic functions into layouts
Provide feedback to Circuit Design Engineers on schematic modifications after layout
Coordinate with PV team to analyze DRC, LVS, ANT, ERC, EMIR and achieve PV closure
Adhere to Marvell core behaviors and continuously improve skills as an Analog Layout Engineer




Utilize Cadence Virtuoso VXL and/or Synopsys Custom Compiler for layouts
Use Mentor Graphics Calibre for DRC/LVS verification
Work independently and in cross-functional, remote teams
Participate in project lifecycle as mentor and technical contributor
Attend regular meetings for progress updates and issue resolution
Qualifications Bachelor's degree in Computer Science, Electrical Engineering or related fields (15+ years of experience)
Master's degree in Computer Science, Electrical Engineering or related fields with 10–12 years of experience
PhD in Computer Science, Electrical Engineering or related fields with 8–10 years of experience
Proficiency with Cadence Virtuoso VXL and/or Synopsys Custom Compiler
Experience with Mentor Graphics Calibre for DRC/LVS
Strong problem-solving and communication skills
Ability to work across functions and with remote teams
Experience in high-speed analog layout in state-of-the-art CMOS

📌 Analog Layout Principal Engineer (Italia)
🏢 Altro
📍 Italia

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