SiPearl is seeking an Emulation Engineer to join our R&D; team in Bologna.
You will work on complex multi-chiplet CPUs, building and maintaining emulation platforms, and validating software ahead of silicon.
The role involves supporting RTL adaptations and collaborating with HW/SW teams to optimize performance.
The ideal candidate has 6+ years in digital ASIC and 4+ years in emulation, with strong Python/HDL/Bash skills, and a proactive, autonomous mindset.
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