ppAs a Mixed Signal Verification engineer in our Catania team, you will verify analog/Mixed Signal IPs and develop SV Real Number and Verilog-AMS models to ensure high-quality designs. You’ll collaborate with designers and systems engineers to validate architecture, test modes, and DFT strategies for analog blocks. The role supports NXP’s AI at the Edge initiative and world-class MCUs. You’ll work in a fast-paced, cross-disciplinary environment focused on robust, scalable verification.



/pulliequal pay for equal work /liliannual incentive opportunities /liliequity /lilicompetitive benefits package /liliDevelop SV Real Number and Verilog-AMS models for analog blocks /liliIdentify design bugs/issues in analog/mixed-signal IPs using modern verification methods /liliPerform top-level analysis and verification of test-modes and DFT strategy for analog blocks /liliBachelor's/Master's in Electronics, Electrical Engineering or Computer Science; PhD is a plus /liliStrong understanding of analog and mixed-signal fundamentals /liliKnowledge of Verilog, SystemVerilog, Verilog-AMS and/or Verilog-A /lili2+ years of experience in Analog Mixed Signal design/verification /liliStrong communication and teamwork skills /liliEnglish proficiency (read, spoken, written) /li /ul /p #J-18808-Ljbffr

📌 Mixed Signal Verification Engineer (Catania)
🏢 Experteer Italy
📍 Catania