As a Mixed Signal Verification engineer in our Catania team, you will verify analog/Mixed Signal IPs and develop SV Real Number and Verilog-AMS models to ensure high-quality designs. You’ll collaborate with designers and systems engineers to validate architecture, test modes, and DFT strategies for analog blocks. The role supports NXP’s AI at the Edge initiative and world-class MCUs. You’ll work in a fast-paced, cross-disciplinary environment focused on robust, scalable verification.

- equal pay for equal work
- annual incentive opportunities
- equity
- competitive benefits package
- Develop SV Real Number and Verilog-AMS models for analog blocks
- Identify design bugs/issues in analog/mixed-signal IPs using modern verification methods




- Perform top-level analysis and verification of test-modes and DFT strategy for analog blocks
- Bachelor's/Master's in Electronics, Electrical Engineering or Computer Science; PhD is a plus
- Strong understanding of analog and mixed-signal fundamentals
- Knowledge of Verilog, SystemVerilog, Verilog-AMS and/or Verilog-A
- 2+ years of experience in Analog Mixed Signal design/verification
- Strong communication and teamwork skills
- English proficiency (read, spoken, written)

#J-18808-Ljbffr

📌 Mixed Signal Verification Engineer (Catania)
🏢 Experteer Italy
📍 Catania