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Infineon seeks a Senior Specialist Digital Design Engineering in our Research & Development team to merge creativity with technical expertise, shaping the future of technology and driving groundbreaking projects.
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Your RoleKey responsibilities in your new role:
Contribute to the digital design of sub-blocks for Analog/Mixed-Signal IPs, including high-speed SerDes, PHYs, and PLLs
Perform unit-level testing and support validation of digital sub-blocks to ensure functionality and performance
Perform digital signoff activities (RTL-to-GDS, LEC, linting, CDC/RDC, ATPG)
Collaborate with System Architecture teams to implement complex digital features such as adaptive channel equalization
Work closely with Analog Design teams to understand and enable digital control of analog blocks
Partner with Digital Physical Design teams to achieve clean timing signoff
Interact with Verification teams to ensure quality of design
Your ProfileQualifications and skills to help you succeed:
A Master's degree in Electrical/Electronic Engineering or a related field of study
2+ years of experience in RTL design, ideally within Analog/Mixed-Signal IP environments
Knowledge of Verilog/SystemVerilog
Basic understanding of digital design flow (RTL-to-GDS,



LEC, linting, CDC/RDC, ATPG)
Exposure to digital test methodologies and/or high-speed SerDes concepts is considered a plus
Strong team player with a collaborative mindset, willingness to learn from experienced engineers and grow in digital design and high-speed IP development
Fluency in English (mandatory)
Please send us your CV in English.
Contact: Rita Costa, LinkedIn
About Infineon and Diversity & Inclusion#WeAreIn for driving decarbonization and digitalization.
Infineon is a global leader in semiconductor solutions for power systems and IoT, enabling green and efficient energy, safe mobility, and smart IoT.
We embrace diversity and inclusion and welcome everyone for who they are.
We offer a working environment characterized by trust, openness, respect and tolerance and are committed to equal opportunities for all applicants and employees.
Pay InformationIndicative Salary Range:
Pavia, Italy: *****€ - *****€
The stated salary comprises annual base pay and target variable compensation.
The starting salary is determined using objective, gender-neutral criteria, including relevant experience, qualifications, and role scope; prior compensation is not requested or considered.
xysqume Employees also vantaggi from a comprehensive total rewards package, which may include additional compensation and benefits depending on local regulations and company policies.
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📌 Senior Specialist Digital Design Engineering (F/M/Div) (Bardi)
🏢 Infineon Technologies
📍 Bardi