In this senior role within Infineon’s Research & Development team, you drive digital design work for analog/mixed-signal IPs, enabling high-performance sub-blocks and signoff processes. You will collaborate with architecture, analog design, and verification teams to deliver robust digital control and features like adaptive channel equalization. This position places you at the intersection of creativity and engineering, shaping scalable IPs for green and secure technologies.

You’ll work in a cross-functional setting that values learning, teamwork, and impactful semiconductor innovations.

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competitive salary with base and variable compensation

Contribute to digital design of sub-blocks for Analog/Mixed-Signal IPs (e.g., SerDes, PHYs, PLLs)

Perform unit-level testing and validate digital sub-blocks for performance





Execute digital signoff activities (RTL-to-GDS, LEC, linting, CDC/RDC, ATPG)

Collaborate with System Architecture to implement complex digital features (e.g., adaptive channel equalization)

Work with Analog Design to enable digital control of analog blocks

Partner with Digital Physical Design to achieve clean timing signoff

Interact with Verification teams to ensure design quality

Master’s degree in Electrical/Electronic xkiyazw Engineering or related field

2+ years of RTL design experience, preferably in Analog/Mixed-Signal IP environments

Knowledge of Verilog/SystemVerilog

Basic understanding of digital design flow (RTL-to-GDS, LEC, linting, CDC/RDC, ATPG)

Exposure to digital test methodologies or high-speed SerDes concepts is a plus

Strong team player with collaborative mindset and willingness to learn

📌 Senior Specialist Digital Design Engineering (f/m/div) (Milano)
🏢 Experteer Italy
📍 Milano