ppAs a Principal Digital Design Engineer in our Research Development team, you’ll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. /p h3Responsibilities /h3 ul liLead the Digital Design team from specification definition to successful silicon bring‑up. /li liDesign digital components for advanced Analogue/Mixed‑Signal IPs, including high‑speed SerDes, PHYs, and PLLs. /li liOwn digital signoff activities across the full flow (RTL‑to‑GDS, LEC, linting, CDC/RDC, ATPG). /li liCollaborate closely with System Architecture teams to define and implement complex digital functions (e.g., adaptive channel equalization). /li liPartner with Analogue Design teams to ensure seamless digital control and integration of analogue blocks. /li liWork alongside Digital Physical Design teams to achieve robust timing closure and clean signoff. /li liEngage with internal customers and Verification teams to drive high‑quality IP definition, integration, and design excellence.



/li /ul h3Qualifications /h3 ul li10+ years of experience in RTL design for Analogue/Mixed‑Signal IPs. /li liStrong leadership mindset with the ability to guide and inspire engineering teams. /li liExpert‑level proficiency in Verilog/SystemVerilog. /li liSolid understanding of the full digital design flow (RTL‑to‑GDS, LEC, linting, CDC/RDC, ATPG). /li liGood knowledge of Digital Test Methodologies. /li liExperience in high‑speed SerDes is highly valued. /li liFluency in English (mandatory). /li /ul h3Benefits /h3 pBachelor's or advanced degree in Electrical Engineering or related field; experience in digital design for advanced IPs; salary range 57,600€–79,200€ (annual base pay plus target variable compensation). Employees also vantaggi from a comprehensive total rewards package, which may include additional compensation and benefits depending on local regulations and company policies. /p pInfineon is committed to diversity, inclusion, and equal opportunity. We welcome applicants of all backgrounds and encourage you to apply even if you do not fully meet all requirements. /p /p #J-18808-Ljbffr

📌 Principal Digital Design Engineer (f/m/div) (Cascina Priora)
🏢 Infineon Technologies
📍 Cascina Priora