07 ago
|
Elettrotecnica
|
Catania
07 ago
Elettrotecnica
Catania
NXP Semiconductors in Italy’s Catania development team is seeking an Electrical Engineer to develop digital sub-circuits for SOCs, featuring RTL in Verilog/SystemVerilog, and to perform synthesis, STA, and formal verification.
You will collaborate with analog, mixed-signal, and software teams to optimize interfaces, ensure integration, and meet project timelines while following DFT and post-silicon validation practices.
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📌 Junior Digital IC Design Engineer – RTL & Verification (Catania)
🏢 Elettrotecnica
📍 Catania