10 ago
|
Experteer Italy
|
Catania
10 ago
Experteer Italy
Catania
Experteer Italy is seeking a Mixed Signal Verification engineer in Catania to verify analog/mixed-signal IPs and build SV Real Number and Verilog-AMS models for analog blocks.
I candidati sono invitati a leggere attentamente tutti gli elementi di questo annuncio. La preghiamo di inviare la sua candidatura tempestivamente.
You will collaborate with designers and systems engineers to validate architecture, test modes, and DFT strategies with focus on robust verification.
The role requires a strong background in analog and mixed-signal xysqume fundamentals, proficiency in Verilog/SystemVerilog/Verilog-AMS/Verilog-A, and 2+ years of related experience,
#J-18808-Ljbffr
📌 Mixed-Signal Verification Engineer — AI-Edge, Equity (Catania)
🏢 Experteer Italy
📍 Catania