#WeAreIn for jobs that impact everyone’s life. Build the future nobody’s dreamed of yet... are you ready to rethink the impossible? As a Staff Analog Mixed‑Signal Design Engineer in our Research & Development team, you will merge creativity with technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.

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Your RoleKey responsibilities

- Design and verify analog circuits for high‑speed SerDes sub‑blocks, including de-/serializers, current and voltage‑mode drivers, Continuous‑Time Linear Equalizers (CTLE), and slicers.
- Perform analog sign‑off activities, including EMI, aging, and other reliability checks.
- Collaborate with System Architecture teams to define and refine specifications for analog sub‑blocks.
- Evaluate and select optimal architectural solutions to meet the design specifications.
- Partner with Digital Design teams to ensure effective control and integration of analog blocks.
- Work closely with Analog Physical Design teams to achieve robust layout implementation for high‑frequency critical blocks.
- Engage with Verification teams to ensure high‑quality, reliable, and silicon‑ready designs.





Your Profile
- A Master’s degree in Electrical/Electronic Engineering or a related field of study.
- 5+ years of experience in analog design for high‑speed SerDes ICs.
- Knowledge of SerDes sub‑block design, including de-/serializers, current and voltage‑mode drivers, Continuous‑Time Linear Equalizers (CTLE), slicers, and related circuits.
- Experience with Analog Design Tools (e.g., Virtuoso, Spectre, and others).
- Experience with FinFET technologies is a strong advantage.
- Strong collaborative mindset with the ability to work effectively in cross‑functional teams and a willingness to learn and continuously develop technical expertise in advanced analog design.
- Fluency in English (mandatory).

Please send us your CV in English.

EEO Statement

We embrace diversity and inclusion. All applicants are given equal opportunities and our recruiting decisions are based on experience and skills. xysqume

Pay Information

Indicative Salary Range: Pavia, Italy €43,440 – €59,730

Employees also benefit from a comprehensive total rewards package, which may include additional compensation and vantaggi elements depending on local regulations and company policies.

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📌 Staff Analog Mixed-Signal Design Engineer (f/m/div) (Pavia)
🏢 Infineon Technologies
📍 Pavia