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Senior Digital Design Engineer Responsibilities FPGA prototyping of design
Development of models & self checking mechanisms for FPGA
HW & S/W Codesign
Architectural design and specification of blocks.
Verilog/SystemVerilog RTL design
Interaction with customer and stakeholders
Design to meet timing, area, low-power, DFT, manufacturing test and timing targets for market
All aspects of design work including interaction with verification and analog team.
Interaction with implementation team to convert RTL to silicon.



Defining timing constraints and performing static timing analysis
Working with architecture and design teams to determine functionality protocols
Qualifications Architectural design and specification of complex systems, especially in system on chip with processors.
Deep knowledge of FPGA development flow
FPGA modelling
Verilog/SystemVerilogRTL design - with emphasison AHB, AXI protocols and processor architecture on ARM cores.
Design to meet timing, area, low-power, manufacturing test and timing targets for market.
All aspects of design work including interaction with verification and analog team.
Interaction with implementation team to convert RTL to silicon.
Working with architecture and design teams to determine functionality protocols
Ability to work well in a diverse team environment
Strong interpersonal, teamwork and communication skills are required.
Precise documentation and attention t

📌 Senior Engineer, Digital Design Engineering (Catania)
🏢 Altro
📍 Catania