Junior Digital Design and RISC-V Architectures Engineer (Cascina)

Junior Digital Design and RISC-V Architectures Engineer (Cascina)

13 ago
|
Fondazione Chips-IT
|
Cascina

13 ago

Fondazione Chips-IT

Cascina

The Chips-IT Foundation is seeking junior researchers to contribute to cutting-edge research and development initiatives centered on digital design and RISC-V architectures. The project focuses on developing advanced digital processors, accelerators, and custom SoCs based on the RISC-V instruction set architecture (ISA) as well as dedicated accelerators. This role will involve participating in the design, optimization, and verification of high-performance, low-power digital systems for applications in next-generation computing platforms, IoT, and embedded systems. Junior Researchers will have the opportunity to learn and apply novel design methodologies, verification techniques, and hardware-software co-design strategies to support innovation in the RISC-V ecosystem. The work can be carried out either in Pavia or in Bologna. Key Responsibilities * Support research and development activities related to digital designs, including processors, accelerators, and SoCs based on the RISC-V architecture. * Assist in the design, implementation,



and verification of digital building blocks (Processors, Accelerators, Memory and Communication Subsystems, etc.) for high-performance, low-power systems. * Collaborate with senior team members and contribute to technical discussions, design reviews, and documentation. * Participate in integration and testing phases on FPGA or silicon platforms. * (Optional) Contribute to dissemination activities including technical reports, academic publications, or conference presentations. Required Qualifications * Master's degree (or close to completion) in Electrical Engineering, Computer Engineering, or a related field with a focus on digital design and processor architectures (Mandatory). * Fundamental knowledge of hardware description languages (HDL) such as Verilog or VHDL, and digital design tools for synthesis, simulation, and verification (Mandatory). * Basic familiarity with RISC-V architecture and interest in custom extensions or hardware

📌 Junior Digital Design and RISC-V Architectures Engineer (Cascina)
🏢 Fondazione Chips-IT
📍 Cascina

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