We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D; capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You bring extensive experience in analog and mixed-signal layout, understanding that successful circuit implementation requires careful attention to routing, matching, shielding, and physical design constraints.

Your technical depth spans multiple layers of layout complexity, from current density analysis to matching arrays that maintain performance across process corners. Working with SERDES architectures, you understand critical signal paths, clock distribution requirements, and comprehensive ESD protection strategies. You are prepared to take ownership of top-level blocks, collaborate with layout teams across geographies,



and provide technical guidance through design reviews. At Synopsys, you will contribute to complex IP solutions that meet stringent customer requirements.

What You'll Be Doing

Design and own analog and mixed-signal layout for SERDES IP blocks including RX, TX, and PLL subcircuits in advanced technology nodes
Optimize layout for signal integrity through differential routing, clock and data path management, and parasitic control
Implement ESD design constraints and latch-up mitigation across mixed-signal designs
Develop custom digital logic cell layout with associated routing to meet performance specifications
Execute layout using Custom Compiler and perform verification with ICV, Calibre, Star-RCXT, and PERC
Provide technical leadership through layout reviews and mentorship of engineering team members

The Impact You Will Have

Enable SERDES IP deployment in customer silicon across multiple foundries and tec

📌 Layout Design, Principal Engineer (Pavia)
🏢 Synopsys
📍 Pavia