In this role you will contribute to functional verification of advanced mixed-signal ASICs, collaborating with analog, digital, and system teams to build and validate behavioral models and SystemVerilog real-number models. You will tailor verification environments, run simulations, and analyze results to ensure high-quality outputs for PMICs, wireless charging, and other complex ICs. You’ll help evolve verification methodologies in an R&D; setting and document assumptions and conclusions clearly. This is a chance to shape the verification of next-generation mixed-signal products within a global, innovation-driven organization.
- Prepare and configure mixed-signal simulation environments based on technical docs
- Execute simulations and analyze results with rigor
- Validate outcomes with analog and digital design teams
- Produce clear technical documentation of results, assumptions, and conclusions
- Contribute to evolving verification methodologies and flows in R&D; environment
- Master's degree in Electrical, Electronic,



or Computer Engineering
- Strong understanding of architecture and behavior of complex electronic systems
- Solid programming skills and analytical mindset
- Strong collaboration and proactive attitude
- Experience with SystemVerilog real-number modeling (highly valued)
- Familiarity with mixed-signal simulation platforms such as Mentor Questa/ADMS, Cadence Xcelium/AMS, Synopsys VCS/AMS
- Knowledge of VHDL, Verilog, Verilog-AMS, or SystemVerilog (plus)

In this role you will contribute to functional verification of advanced mixed-signal ASICs, collaborating with analog, digital, and system t…
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📌 AMS Verification Engineer (Cornaredo)
🏢 Experteer Italy
📍 Cornaredo