Founded in 2003, InvenSense Inc., a TDK Group Company, is the world’s leading provider of MEMS sensor platforms. InvenSense’s vision of Sensing Everything targets the consumer electronics and industrial markets with integrated Motion and Sound solutions. Our solutions combine MEMS (micro electrical mechanical systems) sensors, such as accelerometers, gyroscopes, compasses, and microphones with proprietary algorithms and firmware that intelligently process, synthesize, and calibrate the output of sensors, maximizing performance and accuracy. InvenSense’s motion tracking, audio and location platforms, and services can be found in many of the world’s largest and most iconic brands including smartphones, tablets, wearables, drones, gaming devices, internet of things, automotive products, and remote controls for smart TVs.InvenSense is headquartered in San Jose, CA and has offices in Boston, China, Taiwan, Korea, Japan, France, Canada, Slovakia, and Italy. We’re looking for top-notch Engineers to join our global team. If you’re interested in being a part of our journey and helping us grow to become the leading provider of SoC platform solutions, we definitely want to hear from you. Job Description1. Work with Digital Design, Analog and System teams to understand the design intent and bring up the verification plans and schedules2. Develop test environment, test plan, and test cases based on design specification and verification requirements3. Initiate test plan reviews and verification reviews with the teams at every stage4.



Debug test cases and report verification result to achieve the expected code/functional coverage goal5. Cooperate with cross-functional teams and coordinate priorities to achieve higher productivity6. Take dedicated ownership to execute block level and SOC level verification7. Contribute to the development of behavioral models for analog/MEMS blocksQualification1. MSEE with 7+ years (or PhD with 5+ years) of digital functional verification experience on complex SoC or mixed-signal ASIC product development2. Proven teamwork skills3. Excellent analytical and problem-solving skills4. Excellent oral and written communication skills5. Conversant with some programmable languages such as Verilog, SystemVerilog, Perl/Python/Tcl scripts, Makefile and C++, Matlab6. Experienced with simulation tools such as VCS or NC-Sim/irun7. Experienced with environment and flow build-up with OVM/UVM/VMM, Metric-Driven verification methodology8. Experienced with Assertions like PSL or SVA etc9. (nice to have) Experienced in Real Number Modeling in SystemVerilog or VerilogAMS language for discrete-time behavioral models of analog blocks10. (nice to have) Understanding assembly programming and firmware developmentThe compensation package offered for this position is the following:Average RAL (Gross Annual Salary) from 50 to 60K .Variable compensation depending on Personal and Corporate performances: of up to 30%Benefits: 9 meal vouchers, car parking or public transport pass, supplemental health insurance.The salary range is relative to the specified job grade offered, which may vary based on the candidate's actual experience.

📌 Digital Verification Engineer - Staff (Milano)
🏢 InvenSense
📍 Milano