I am recruiting for an Analog Layout Engineer on behalf of my client, a reputable organisation developing advanced IC solutions. This Analog Layout Engineer role offers a predominantly remote working arrangement and exposure to a range of analog and mixed signal projects. My client is looking for an Analog Layout Engineer with strong full custom layout experience, including Fin FET technology, working closely with design teams from specification through to tape out. Responsibilities: • Deliver custom analog and mixed signal IC layouts • Work with Analog IC Designers on physical implementation • Perform floorplanning, placement and routing • Apply matching, symmetry, common centroid and parasitic reduction techniques • Carry out DRC, LVS and ERC checks • Support extraction and silicon validation activities • Contribute to design reviews and tape out delivery Requirements:



• Experience as an Analog Layout Engineer in custom IC environments • Strong Fin FET experience alongside CMOS or BCD technologies • Strong knowledge of layout techniques, including matching, guard rings, symmetry and parasitics • Experience with Cadence Virtuoso and verification flows • Understanding of semiconductor design rules and full layout processes • Exposure to power, sensor, automotive or mixed signal ICs beneficial • Experience across multiple process nodes beneficial • Tape out experience advantageous • Ability to work independently and within multidisciplinary teams This opportunity is open to candidates who are eligible to work in the EU, with a salary range of €40k to €45k, dependent on experience and alignment with the requirements of the role.

📌 Analog layout engineer (Roma)
🏢 Ic Resources
📍 Roma