ppIn this role you will contribute to functional verification of advanced mixed-signal ASICs, collaborating with analog, digital, and system teams to build and validate behavioral models and SystemVerilog real-number models.
You will tailor verification environments, run simulations, and analyze results to ensure high-quality outputs for PMICs, wireless charging, and other complex ICs.
You'll help evolve verification methodologies in an RD setting and document assumptions and conclusions clearly.
This is a chance to shape the verification of next-generation mixed-signal products within a global, innovation-driven organization.
/pulliPrepare and configure mixed-signal simulation environments based on technical docs /liliExecute simulations and analyze results with rigor /liliValidate outcomes with analog and digital design teams /liliProduce clear technical documentation of results, assumptions, and conclusions /liliContribute to evolving verification methodologies and flows in RD environment /liliMaster's degree in Electrical, Electronic,



or Computer Engineering /liliStrong understanding of architecture and behavior of complex electronic systems /liliSolid programming skills and analytical mindset /liliStrong collaboration and proactive attitude /liliExperience with SystemVerilog real-number modeling (highly valued) /liliFamiliarity with mixed-signal simulation platforms such as Mentor Questa/ADMS, Cadence Xcelium/AMS, Synopsys VCS/AMS /liliKnowledge of VHDL, Verilog, Verilog-AMS, or SystemVerilog (plus) /li /ulpIn this role you will contribute to functional verification of advanced mixed-signal ASICs, collaborating with analog, digital, and system t... /ppLeading careers For members only /ph3Take your next career step /h3p1M+ top positions worldwide with salary benchmarks /ppBe discreetly found and contacted by headhunters /ppExclusively for senior-level professionals and executives /p /p #J-*****-Ljbffr

📌 Ams Verification Engineer (Bardi)
🏢 Experteer Italy
📍 Bardi