p¡At Oesia Group, we are growing!
We would like to count with you for our next job offer: /ppbr / /ppstrongOesía Group /strong is a Spanish multinational company specialized in dual-use digital and industrial engineering, developing and implementing projects worldwid /ppbr / /ppAs astrong Chief FPGA SoC Architect /strong to join an important Project located in strongMadrid, Spain.
/strong /ppNote that this possition rstrongequires relocation to Spain /strong /ppbr / /ppstrongWhat are we looking for?
/strong /ppAn/a Chief FPGA SoC Architect with at least 10 years of experience.
strongemAvailability to relocate to Madrid, Spain.
/em /strong /ppbr / /ppbr / /ppstrongResponsabilities: /strong /ppbr / /pulliProvide support and validation for functional and structural strongFPGA/SoC architectures /strong within aerospace and defense components and systems.
/lilistrongAct as technical authority /strong, responsible for key design decisions, trade-offs, and critical reviews throughout the product design and development lifecycle.
/lilistrongCompliance with Aerospace/Defense Standards /strong and Regulatory Frameworks such as DO?254, DO?160, MIL?STD?461 (EMI/EMC), MIL?STD?810, ECSS?Q?ST?*****, EN**** / ISO ****, RTCA/EASA.
/lilistrongLead FPGA /strong engineering, digital verification, HW/SW integration, and validation teams.
/liliTransfer technical expertise, mentor engineers, and estrongstablish internal design and verification standards.
/strong /lilistrongEnsure adherence to best practices in RTL design /strong, documentation, and configuration management.
/lilistrongSimulation models, testbenches, and UVM /strong environments and High?integrity RTL code (VHDL/Verilog/SystemVerilog).
/lilistrongValidate VV plans /strong, requirement matrices, and coverage metrics.
/lilistrongParticipate in bids, effort estimations /strong, and definition of technical strategies.
/liliLead standardization initiatives and continuous improvement in design and verification processes.
/li /ulpbr / /ppbr / /ppstrongQualifications:



/strong /ppbr / /pullistrongDegree in Telecommunications, Electronics /strong, Industrial, Aerospace Engineering, or similar.
/liliHighly valued: Master's degree or specialization in high?reliability digital design is highly valued.
/li /ulpbr / /ppbr / /ppstrongRequired skills: /strong /ppbr / /pullistrong?10 years in FPGA/SoC /strongdesign and verification within high?criticality sectors.
/lilistrong?3 years leading teams /strong or acting as technical authority in projects.
/liliProven experience in the strongdesign of systems /strong or strongcomponents /strongfrom leading manufacturers in aerospace and defense environments (DAL A/B/C or equivalent requirements).
/liliProficiency in: strongVerification: UVM, test environments, coverage methodologies and tools like Vivado, ModelSim/Questa, Libero /strongSoC.
/li /ulpbr / /ppbr / /ppstrongHabilidades Preferidas /strong /ppbr / /ppbr / /pulliExperience in high?criticality sectors.
/liliLeadership experience in technical projects.
/li /ulpbr / /ppbr / /ppstrongWhat we offer you?
/strong /ppstrongWork in a multinational company /strongrecognized as one of the best companies to work for in ****, according to Actualidad Económica and Forbes.
/ppStable and innovative technological projects for leading national and international clients.
/ppstrongCareer plan /strong: we offer an attractive professional career based on experience and personal potential within a continuously evolving company with solid growth.
/ppFree access to various training platforms, providing you with a wide multidisciplinary catalog.
Flexible compensation.
/ppAn equal, diverse company with great Corporate Social Responsibility.
/ppA positive, healthy, and cooperative work environment.
/ppstrongTeamwork /strongis the cornerstone of the company's project successes.
/ppbr / /ppbr / /ppstrongHave you heard about us?
/strong /ppbr / /ppWith over ***** professionals in 20 corporate offices across Spain, Brussels, Latin America, and Asia, it generates quality employment and helps people grow in technical careers.
/ppbr / /p

📌 Chief Fpga & Soc Architect (Lazio)
🏢 Grupo Oesía
📍 Lazio