16 set
|
Inventvm Semiconductor
|
Viu'
16 set
Inventvm Semiconductor
Viu'
INVENTVM is seeking an AMS Verification Engineer to verify mixed-signal ICs by building robust verification environments, testbenches, and coverage plans. You will collaborate with analog and digital teams to ensure first-pass silicon success and to model analog blocks using Verilog-A/Verilog-AMS and RNM.
Responsibilities include functional and regression simulations, debugging, scripting for automation, and bringing up silicon with lab measurements. English communication is essential.
📌 AMS Verification Engineer — Equity (Viu')
🏢 Inventvm Semiconductor
📍 Viu'