EDA Design Center Lead for SoC Innovation (Cascina)

EDA Design Center Lead for SoC Innovation (Cascina)

18 set
|
Fondazione Chips-IT
|
Cascina

18 set

Fondazione Chips-IT

Cascina

About Fondazione Chips-IT
The Foundation “Italian Center for the Design of Semiconductor Integrated Circuits,” also known as the Chips-IT Foundation, is a nonprofit research and technology organization under the supervision of the Ministries of Industry.
The Foundation is Italy's first RTO (Research and Technology Organization) vertically focused on semiconductor research and stands as a center of excellence in frontier research on semiconductor design, as well as a pivotal center of the Italian semiconductor ecosystem and expertise.
Missions Of The Foundation

Promote the design and development of integrated circuits
Strengthen the system of professional training in the field of microelectronics
Ensure the establishment of a network of universities, research centers and enterprises that fosters innovation and technology transfer in the field
Posizione
The Chips-IT Foundation is seeking a senior professional to lead and support the activities of its Microelectronics Design Center. This role is central to ensuring the efficiency, reliability,



and continuous evolution of design tools, laboratory infrastructure, and the overall R&D; environment for advanced System-on-Chip (SoC) development. The Lead of Microelectronics Design Center EDA Support Group will be responsible for the maintenance, optimization, and governance of Electronic Design Automation (EDA) flows, Process Design Kits (PDKs). This position serves as a technical focal point for microelectronics design infrastructure, coordinating interactions with foundries, and EDA vendors, while enabling seamless SoC design from concept through tape-out.
Location: The work can be carried out either in Pavia or in Bologna.
Key Responsibilities

Coordinate with vendors for EDA tool procurement, licensing, and maintenance contracts.
Maintain and optimize EDA toolchains for digital design, including simulation, synthesis, verification, and physical design.
Manage PDK installations and updates, acting as the technical liaison

📌 EDA Design Center Lead for SoC Innovation (Cascina)
🏢 Fondazione Chips-IT
📍 Cascina

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