p sectionh3Your tasks /h3 p ul liTechnical expert and recognized authority for physical implementation of high-speed digital and mixed-signal ICs /li liLead place-and-route implementation from synthesis results through PnR to sign-off and tape-out /li liDefine, deploy, and maintain digital backend methodologies, flows, and best practices /li liDrive timing closure, power, performance, area (PPA), signal integrity, EM/IR and physical verification strategies /li liMentor and develop engineers within the digital backend community /li liLead EDA tool evaluations, methodology improvements, and flow automation initiatives /li liSupport technology enablement for advanced CMOS nodes including FinFET and FD-SOI /li liProvide technical leadership across multiple projects and business units /li liAct as interface to foundries, EDA vendors, and methodology teams /li liDrive continuous improvement of backend design efficiency and quality /li /ul /p /sectionsectionh3Who we are looking for /h3 p ul liMSc or PhD in Electrical Engineering, Microelectronics,



or related field /li li10+ years of experience in digital physical implementation and backend design /li liProven expertise with industry-standard physical design tools and flows (Cadence EDA flow preferred) /li liStrong knowledge of floorplanning, placement, CTS, routing, STA, physical verification, power integrity, and signal integrity analysis /li liExtensive experience with timing closure and sign-off methodologies /li liExperience with high-speed interfaces such as UCIe, PCIe, DDR, SerDes, USB, MIPI, or similar protocols is highly desirable /li liExperience driving methodology development and engineering best practices across multiple projects /li liStrong communication, collaboration, mentoring, and technical leadership skills /li liAbility to work independently and influence technical decisions at organizational level /li /ul /p /sectionsectionams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities. /section /p

📌 Principal HS Digital Place & Route Engineer (d/m/f) (Pavia)
🏢 Ams Italy
📍 Pavia