Le interessa questa occasione? Si candidi in fretta, è previsto un elevato volume di candidature. Scorra verso il basso per leggere la descrizione completa.Your tasksTechnical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC productsDefine digital subsystem architecturesLead RTL development and integrationDrive design reviews and quality standardsSupport verification and implementation teamsMentor design engineersWho we are looking forMSc or PhD in Electrical Engineering10+ years digital IC design experienceRTL design (Verilog/SystemVerilog)High-speed digital IC design experience for communication or mixed-signal SoC products is required; knowledge of high-speedinterfaces such as UCIe,



PCIe or similar protocols is an advantageInterface protocols and clock-domain crossingSynthesis and timing analysisAdvanced CMOS node experience, including FinFET and/or FD-SOI, is requiredams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. xrtlpzc All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities.

📌 Principal Hs Digital Design Engineer (D/M/F) (Pavia)
🏢 ams OSRAM
📍 Pavia