ph3Descrizione dell’offerta di lavoro /h3 /brpINVENTVM is actively looking for a talented AMS Verification Engineer to join the design team.Pronto/a a candidarsi? La preghiamo di leggere la descrizione almeno una volta prima di fare clic su "Candidati".In this role, you will be responsible for verifying mixed-signal and analog/mixed-signal (AMS) integrated circuits by developing robust verification environments, creating testbenches, and ensuring first-pass silicon success. You will work closely with analog and digital designers throughout the product development cycle. /p /brh3Key Responsibilities /h3 /brul /brliDevelop and execute verification plans for analog and mixed-signal IPs and SoCs /li /brliCreate, maintain, and enhance AMS verification environments using industry-standard methodologies /li /brliDevelop behavioral models of analog blocks using Verilog-A, Verilog-AMS, SystemVerilog RNM, or equivalent modeling languages /li /brliDesign testbenches, stimuli, checkers, assertions, and coverage metrics to validate mixed-signal functionality /li /brliPerform functional, corner, Monte Carlo, and regression simulations /li /brliCollaborate with analog and digital design teams to identify, debug, and resolve functional issues /li /brliSupport integration and verification of analog IPs within larger digital or mixed-signal SoCs /li /brliAnalyze simulation results and communicate findings through clear technical reports /li /brliContribute to verification methodology improvements, automation,



and scripting /li /brliSupport silicon bring-up and correlation between simulation and laboratory measurements when required /li /br /ul /brh3Required Qualifications /h3 /brul /brliMaster's degree in Electrical Engineering, Electronics Engineering, or a related field /li /brliSolid understanding of analog and mixed-signal circuit fundamentals, including: Operational amplifiers Comparators ADCs and DACs PLLs (preferred) Voltage regulatorsand references Switched-capacitorcircuits /li /brliExperience with AMS simulation and verification tools (e.G., Cadence Virtuoso, Spectre, Xcelium) /li /brliKnowledge of Verilog-AMS, Verilog-A, SystemVerilog, or Real Number Modeling (RNM) /li /brliFamiliarity with scripting languages such as Python, Tcl, Perl, or Shell /li /brliStrong debugging and problem-solving skills /li /brliGood communication skills and ability to work effectively in cross-functional teamsFluent in English /li /br /ul /brh3Desirable Qualifications /h3 /brul /brliExperience with UVM-based verification environments. /li /brliKnowledge of digital verification methodologies. /li /brliFamiliarity with mixed-signal modeling techniques and abstraction levels. /li /brliExperience with low-power verification concepts. /li /brliUnderstanding of CMOS device operation and semiconductor fundamentals. xysqume /li /br /ul /brpAll INVENTVM positions offer a stake in the company equity that also entitles to receive dividends, competitive benefits, sustainable work logistics aimed at balancing personal life and project deadlines. /p /p #J-18808-Ljbffr

📌 Analog Mixed-Signal Verification Engineer (Viu')
🏢 Inventvm Semiconductor
📍 Viu'