ams OSRAM is seeking a highly experienced Digital Backend design expert to lead complex place-and-route activities and develop robust backend flows for cutting-edge CMOS technologies. You will drive timing closure, PPA, and verify physical integrity while mentoring teams across multiple projects.
The role requires a PhD or MSc in Electrical Engineering or Microelectronics, 10+ years in digital backend design, and strong Cadence EDA experience.
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📌 Senior Digital P&R Architect – Timing & PPA Lead (Rho)
🏢 Ams Italy
📍 Rho
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