ph3Your tasks /h3 ul liTechnical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products /li liDefine digital subsystem architectures /li liLead RTL development and integration /li liDrive design reviews and quality standards /li liSupport verification and implementation teams /li liMentor design engineers /li /ul h3Who we are looking for /h3 ul liMSc or PhD in Electrical Engineering /li li10+ years digital IC design experience /li liRTL design (Verilog/SystemVerilog) /li liHigh-speed digital IC design experience for communication or mixed-signal SoC products is required; knowledge of high-speed interfaces such as UCIe,



PCIe or similar protocols is an advantage /li liInterface protocols and clock-domain crossing /li liSynthesis and timing analysis /li liAdvanced CMOS node experience, including FinFET and/or FD-SOI, is required /li /ul pams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities. /p /p #J-18808-Ljbffr

📌 Principal HS Digital Design Engineer (d/m/f) (Carezzano)
🏢 Ams Italy
📍 Carezzano