Location: Italy / Hybrid -- Employment: Full-time - Compensation: €85,000–€100,000 gross annual salary (RAL), depending on experience - Equity: Stock options / equity participation available
About Daidalos
Daidalos is building a new generation of AI accelerator IP designed to bring advanced and agentic AI directly to the edge.
Our architecture addresses one of the key bottlenecks of modern AI systems: the movement of data between memory and compute. By rethinking how neural-network workloads are mapped onto hardware, we aim to deliver high performance with significantly lower memory bandwidth, power consumption and system complexity.
We are moving from FPGA validation toward our first silicon implementations and are looking for a Head of Silicon to lead this transition.
The Role
We are looking for an experienced semiconductor leader who can take ownership of the silicon development process, from architecture handoff to tape-out and silicon bring-up.
You will work directly with the founders and technical team, translating our AI accelerator architecture into a manufacturable,



reliable and high-performance ASIC.
This is a hands-on leadership role. At this stage, we are looking for someone who is comfortable both making architectural decisions and getting deeply involved in implementation, verification and tape-out execution.
Because our technology sits at the intersection of AI algorithms and semiconductor architecture , the ideal candidate must be able to understand not only how to build a chip, but also how neural networks behave computationally and how AI workloads should influence hardware design decisions.
What You Will Own
Lead the end-to-end ASIC development process , from RTL to GDSII and tape-out.
Define the silicon implementation roadmap, methodology and execution plan.
Drive synthesis, timing closure, physical design, power and area optimization.
Own sign-off activities including STA, DRC, LVS, power integrity and related verification flows.
Coordinate RTL,

📌 Head of Silicon (Roma)
🏢 Altro
📍 Roma