ams Italy S.r.l. is seeking a Technical Leader to own architecture and RTL development for high-speed digital subsystems in communication ICs and mixed-signal SoCs. You will define architectures and lead RTL design, ensuring integration and adherence to quality standards.
The role requires 10+ years of digital IC design experience, strong Verilog/SystemVerilog skills, and expertise in high-speed interfaces and timing analysis. FinFET/FD-SOI experience is preferred.
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📌 Senior High-Speed Digital Design Architect (RTL/SoC) (Casalpusterlengo)
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📍 Casalpusterlengo
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