ams Italy S.r.l. is seeking a Technical Leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products.
You will define digital subsystem architectures and lead RTL development and integration across teams.
The role requires 10+ years of digital IC design, expertise in Verilog/SystemVerilog, and experience with interfaces like UCIe or PCIe; advanced CMOS nodes (FinFET/FD-SOI) are preferred.
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📌 Senior Digital Ic Architect | High-Speed Rtl & Soc Design (Bardi)
🏢 Ams Italy
📍 Bardi
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