Overview In this role you will help design and validate power management ICs (PMICs) and Power IPs for consumer devices. You will collaborate with a global, multi-disciplinary team to bring PMICs from concept to production, shaping power solutions for high-volume electronics. You'll engage with customers, contribute to pre- and post-silicon activities, and guide layout and verification efforts.

This position offers growth within a dynamic PES team focused on cutting-edge PMIC technologies and mixed-signal power design.

Responsabilità Define and design complex Power IPs Execute PMIC design, pre-silicon verification and post-silicon validation Guide physical design/layout team Engage with customers on technical feasibility Participate in weekly IC development meetings and milestone workshops Foster continuous learning and improvement culture Support project management,



task planning, and scheduling Requisiti fondamentali Degree in Electrical Engineering, Computer Science, or Computer Engineering with 3+ years of experience IP Analog Design experience Strong analytical problem-solving Good teamwork and multi-discipline collaboration Understanding of Mixed-Signal Design Flow and Top-Down development Understanding of Power IP Topologies Analog functional and parametric verification PVT corners, layout parameter extraction, simulations Strong written and verbal communication team player communication problem-solving Cadence Suite (Virtuoso ADE Spectre) Scripting languages Verilog/SystemVerilog (HDL)

📌 Senior Engineer, Analog Design Engineering (Varese)
🏢 analog devices
📍 Varese