pams OSRAM in Italy seeks a Technical Leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products.
You will define digital subsystem architectures and lead RTL integration.
/ppYou will mentor engineers, drive design reviews, and collaborate closely with verification and implementation teams.
A MSc or PhD in Electrical Engineering and 10+ years of digital IC design experience are required, with Verilog/SystemVerilog and /p #J-*****-Ljbffr
📌 Senior Digital Ic Architect & Rtl Lead (High-Speed) (Bardi)
🏢 Ams Italy
📍 Bardi
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