24 set
|
Ams Italy
|
Montebello della Battaglia
24 set
Ams Italy
Montebello della Battaglia
ams Italy S.r.l.
Aumenti le sue possibilità di ottenere un colloquio leggendo la seguente panoramica di questo ruolo prima di candidarsi.
seeks a Technical Leader for architecture and RTL development of high-speed digital subsystems in communication ICs and mixed-signal SoCs.
You will define architectures, lead RTL development, and drive design reviews while mentoring engineers.
Requirements include MSc/PhD in Electrical Engineering and 10+ years in digital IC design with RTL (Verilog/SystemVerilog). xjncmbx
Knowledge of high-speed interfaces like UCIe/PCIe is a plus.
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📌 Senior RTL & High-Speed Digital IC Architect (Montebello della Battaglia)
🏢 Ams Italy
📍 Montebello della Battaglia