pams OSRAM is seeking a technical leader to architect and drive RTL development for high-speed digital subsystems in communication ICs and mixed-signal SoCs. You will define digital architectures, lead RTL efforts, and mentor engineers on design reviews and quality standards. /ppThe role requires MSc/PhD in Electrical Engineering with 10+ years in digital IC design, Verilog/SystemVerilog proficiency, and experience with high-speed interfaces. /p #J-18808-Ljbffr
📌 Lead Digital IC Architect – High-Speed SoC RTL (Canneto Pavese)
🏢 Ams Italy
📍 Canneto Pavese
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