26 set
|
Ams Italy
|
Canneto Pavese
26 set
Ams Italy
Canneto Pavese
ams OSRAM is seeking a technical leader to architect and drive RTL development for high-speed digital subsystems in communication ICs and mixed-signal SoCs.
Non è protetto/a delle competenze necessarie per questa opportunità? Legga la descrizione completa qui sotto per avere un quadro completo dei requisiti richiesti.
You will define digital architectures, lead RTL efforts, and mentor engineers on design reviews and quality standards. xjncmbx
The role requires MSc/PhD in Electrical Engineering with 10+ years in digital IC design, Verilog/SystemVerilog proficiency, and experience with high-speed interfaces.
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📌 Lead Digital IC Architect – High-Speed SoC RTL (Canneto Pavese)
🏢 Ams Italy
📍 Canneto Pavese