OverviewNon aspetti a candidarsi dopo aver letto questa descrizione: per questa possibilità è previsto un elevato volume di candidature.In this role you lead mixed-signal verification efforts for automotive and industrial products within NXP's Advanced Power System team. You'll define verification strategies, drive methodology improvements, and collaborate with global experts to deliver robust silicon with strong quality. You will own AMS verification deliverables from specification to silicon correlation and bridge digital and analog verification flows. This position offers impact across complex ASIC/mixed-signal projects and opportunities to shape verification practices at scale.Retribuzione / Benefitsannual incentive opportunitiesequitycompetitive benefits packageResponsabilitàLead AMS verification activities and guide engineers toward successful project deliveryDefine verification plans, strategies, environments, regressions, and coverage objectivesDevelop and validate mixed-signal simulation environments, models, checkers, and reusable componentsBridge digital and mixed-signal verification flows for robust top-level verificationDrive methodology improvements to increase simulation efficiency, reuse,



quality, and cost effectivenessSupport design reviews, bug tracking, post-silicon correlation, and continuous improvement across projectsOwn key AMS verification deliverables from specification review to silicon correlationRequisiti fondamentali10+ years of experience in AMS or mixed-signal IC verificationStrong experience leading verification activities for complex ASIC or mixed-signal IC projectsSolid knowledge of analog fundamentals, digital RTL debug, co-simulation, and mixed-signal verification methodologiesHands-on experience xysqume with verification plans, testbenches, regressions, coverage, reviews, and bug closureExperience with Verilog, SystemVerilog, UVM, SVA, Verilog-AMS, SystemC, WREAL/RNM modellingExperience with EDA tools such as Cadence Virtuoso, Xcelium, Spectre, and vManagerGood scripting skills in Python, Perl, or TCL, and experience with Git, SVN, or DesignSyncAnalytical mindsetStrong ownershipStructured problem-solvingAMS/mixed-signal verificationVerilog, SystemVerilog, UVM, SVA, Verilog-AMS, SystemCWREAL/RNM modelling

📌 Senior Ams Verification Leader (Provincia di Varese)
🏢 NXP Semiconductors
📍 Provincia di Varese