Nokia in Italy is seeking an experienced SoC Physical Design Engineer to drive physical design for Optical Network ASICs across 3/5/7nm nodes, focusing on power, performance, and area. You will perform floorplanning, place & route, and timing closure, collaborate with logic designers and hardware teams, and develop PD methodologies and automation scripts from Synthesis to GDSII.
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The role xysqume values problem solving, analytical mindset, and strong teamwork, with flexible/hybrid working schemes and
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📌 SoC Physical Design Engineer: Power, Timing & Automation (Bardi)
🏢 Nokia
📍 Bardi