ph3ADVANCE YOUR CAREER.
ADVANCE THE WORLD.
/h3pAt AMD, we believetechnology has the power to solve the world's most important challenges.
From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.
/ppWhetheryou'redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we'll advance your career.
/ph3STAFF LAYOUT DESIGN ENGINEER /h3h3THE ROLE: /h3pThe AMD SerDesTechnology Group develops high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS process.
We are currently seeking an experience analog/mixed-signal layout design engineer to join ourworld-class team in the development of SerDes solutions to facilitate the future connectivity of AMD CPU and GPU products.
/ph3THE PERSON: /h3pYou have a passion for high speed layout design with innovative and creative ideas to solve complex design challenges.
You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones.
You have strong analytical and problem-solving skills, and are willing to learn, and ready to take on problems.
/ph3KEY RESPONSIBILITIES: /h3ulliLayout design of high speed and high performance SerDes analog mixed signal circuit in accordance to project requirements and specifications.
/liliBlock level physical implementation which includes floor-planning,



power distribution network, clock and signal routing, analog and mixed signal transistor level layout.
/liliParticipate in post-layout circuit performance analysis.
/liliParticipate in block/IP/chip level integration activities.
/liliEstimate realistic schedule, track and report clear progress and status.
/liliStrong participation in defining layout methodology and flow.
/liliDriving layout productivity improvement initiatives (i.e., pcell development and automation).
/liliOther responsibilities which include supervision of layout resources (onsite and offsite), assessing and correcting layout quality issues, and providing feedback to design teams.
/li /ulh3PREFERRED EXPERIENCE: /h3ulliGood understanding of analog and mixed signal layout fundamentals, IR, EM, self and coupling capacitances, RC delay and self-heating.
/liliGood understanding of high speed critical signal routing and shielding.
/liliStrong in physical design verifications (LVS/DRC/ERC/ANT/ESD/etc.).
/liliFamiliarity with circuit design concepts/flows and IC manufacturing processes.
/liliExperience in layout of high-speed SerDes blocks and PLLs in advanced Fin-FET process is a plus.




/liliExperience with digital on top integration flow or digital SOC flow is a benefit.
/liliExperience with Cadence SKILL and other programming is a agevolazioni (Perl, Python, Tcl, etc.).
/liliAbility to work closely with the remote different time zones design teams.
/liliExcellent team player and good communication skills.
/li /ulh3ACADEMIC CREDENTIALS: /h3ulliBachelors or Masters degree in Computer Engineering/Electrical Engineering.
/li /ulp#LI-PL1 /pp#LI-REMOTE /ppBenefits offered are described: AMD benefits at a glance.
/ppAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services.
AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.
We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
/ppAMD may use Artificial Intelligence to help screen, assess or select applicants for this position.
AMD's "Responsible AI Policy" is available here.
/ppThis posting is for an existing vacancy.
/p /p #J-*****-Ljbffr

📌 Staff Layout Engineer (Milano)
🏢 Advanced Micro Devices
📍 Milano