In this role you will define and execute verification strategies for power management ICs, bridging hardware and firmware validation. You will operate within a globally distributed team to translate specifications into robust verification plans that maximize functional and code coverage. You will lead pre-silicon verification activities and contribute to silicon validation readiness while promoting advanced methodologies.

This position offers impact in automotive and industrial markets through scalable, reusable verification environments and cross-functional collaboration.

Develop SoC, subsystem, and block-level verification plans based on IC specifications

Build, maintain, and enhance scalable and reusable verification environments

Drive verification quality to meet target functional and code coverage metrics

Promote and implement innovative verification methodologies and technologies

Ensure comprehensive verification of hardware and firmware

Analyze, debug, and root-cause verification failures





Lead verification activities across the full lifecycle, from planning to silicon validation readiness

Collaborate with cross-functional teams and communicate through coverage reviews, design/code reviews, and project updates

BSEE/MSEE (7–10+ years)

StrongSystemVerilog and UVM expertise including vertical reuse methodologies

Solid knowledge of industry-standard EDA tools and verification flows

Proven debugging of complex verification issues

Hands-on experience with Assertion-Based Verification (SVA/PSL)

Understanding of formal verification methodologies and coverage closure

Proficiency in Python, Tcl, or C-shell

Experience in technical leadership and mentoring

Good understanding of analog and mixed-signal IC architectures and integration challenges clear communication leadership

UVM formal verification

Principal Verification Engineer monza-brianza, lombardia, it

📌 Principal Verification Engineer (Monza)
🏢 Altro
📍 Monza