Xsight Labs is seeking a Senior SerDes & High-Speed PHY Validation Engineer to lead validation for 112G PAM4 and future 224G technologies. You will own test plans, perform advanced measurements, and collaborate across silicon, package, board, and system teams to drive product readiness.
The role emphasizes lab ownership, automation, and data-driven investigations, with opportunities to influence next-generation Ethernet PHY designs.
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📌 Lead High-Speed SerDes & PHY Validation Architect (Italia)
🏢 Xsight Labs
📍 Italia
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