06 ott
|
Xsight Labs
|
San Michele All'adige
06 ott
Xsight Labs
San Michele All'adige
Xsight Labs is seeking a motivated SerDes & High-Speed PHY Validation Engineer to join our connectivity validation team and contribute to next-generation Ethernet networking solutions for AI and data center applications.
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You will validate 112G PAM4 and future 224G PHY architectures, perform eye-diagram, BER, and jitter analyses, xysqume and collaborate with SI/PI, design and system teams to deliver robust lab-tested products.
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📌 High-Speed SerDes & PHY Validation Engineer (San Michele All'adige)
🏢 Xsight Labs
📍 San Michele All'adige