STMicroelectronics in Italy is seeking a Mixed Signal verification engineer with 3 to 5 years of experience in analog and mixed-signal ASIC verification. You will contribute to the MEMS sGROUP verification efforts across ASIC levels, from specs to final product validation.
The role emphasizes development of verification test benches and components, using SystemVerilog and Verilog-AMS, with opportunities to work on cutting-edge SoC verification methodologies and cross-functional collaboration.
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