Job description:

• Perform Digital Physical Implementation for complex integrated circuits
• Execute all the steps of RTL2GDS flow (synthesis, floorplan, Place&Route;, EMIR analysis, ECO flows)
• Interact with digital designers to refine SDC timing constraints for synthesis and place & route
• Run Static Timing Analysis (STA) and Signoff checks
• Help to debug designs at both pre- and post-silicon
• Collaborate with cross-functional teams to deliver optimized backend solutions

Profile description:

• Master’s degree in Electronics Engineering, Electrical Engineering, Physics or similar
• Strong proficiency in digital backend design tools and flows (Cadence flow)
• Solid understanding of Signoff Checks (timing closure, signal integrity, EMIR, physical verification)




• Ability to work independently and in team environments
• Excellent problem-solving and communication skills
• Fluency in English is mandatory, Italian is beneficial

We offer:

ams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities.

Hana Krsul
[email protected]

📌 Senior Digital Design Backend Engineer (Pavia)
🏢 ams OSRAM
📍 Pavia