10 ott
|
Fondazione Chips-IT
|
Lombardia
10 ott
Fondazione Chips-IT
Lombardia
FONDAZIONE CHIPS-IT seeks a CAD & EDA Flow Engineer to manage and optimize the EDA infrastructure for advanced SoC design up to tape-out. You will liaise with Cadence, Synopsys and Siemens, install and maintain PDKs across digital, analog and RF workflows, and support foundries for DRC/LVS and tape-out readiness. The role is based in Italy, with options between Pavia and Bologna. You will also create internal trainings and documentation to accelerate design teams and evolve design flows.
📌 CAD Engineer (Lombardia)
🏢 Fondazione Chips-IT
📍 Lombardia