Analog Mixed-Signal Verification Engineer (Milano)

Analog Mixed-Signal Verification Engineer (Milano)

15 ott
|
Inventvm Semiconductor
|
Milano

15 ott

Inventvm Semiconductor

Milano

INVENTVM is actively looking for a talented AMS Verification Engineer to join the design team. In this role, you will be responsible for verifying mixed-signal and analog/mixed-signal (AMS) integrated circuits by developing robust verification environments, creating testbenches, and ensuring first-pass silicon success. You will work closely with analog and digital designers throughout the product development cycle. Key Responsibilities * Develop and execute verification plans for analog and mixed-signal IPs and SoCs * Create, maintain, and enhance AMS verification environments using industry-standard methodologies * Develop behavioral models of analog blocks using Verilog-A, Verilog-AMS, SystemVerilog RNM, or equivalent modeling languages * Design testbenches, stimuli, checkers, assertions, and coverage metrics to validate mixed-signal functionality * Perform functional, corner, Monte Carlo, and regression simulations * Collaborate with analog and digital design teams to identify, debug,



and resolve functional issues * Support integration and verification of analog IPs within larger digital or mixed-signal SoCs * Analyze simulation results and communicate findings through clear technical reports * Contribute to verification methodology improvements, automation, and scripting * Support silicon bring-up and correlation between simulation and laboratory measurements when required Required Qualifications * Master's degree in Electrical Engineering, Electronics Engineering, or a related field * Solid understanding of analog and mixed-signal circuit fundamentals, including: o >> Operational amplifiers o >> Comparators o >> ADCs and DACs o >> PLLs (preferred) o >> Voltage regulators and references o >> Switched-capacitor circuits * Experience with AMS simulation and verification tools (e.g., Cadence Virtuoso, Spectre, Xcelium) * Knowledge of Verilog-AMS, Verilog-A, SystemVerilog, or Real Number Modeling (RNM) * Familiarity with scripting languages such as Python, Tcl, Perl

📌 Analog Mixed-Signal Verification Engineer (Milano)
🏢 Inventvm Semiconductor
📍 Milano

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