20 ott
|
Nokia
|
Macerata
Nokia is seeking a SoC Physical Design Engineer to implement physical design for Optical Network ASICs across cutting-edge nodes in a hybrid working environment. You will perform floorplanning, placement, routing, and timing closure, collaborating with RTL designers and hardware teams to optimize power, performance, and area.Continui a leggere per scoprire di cosa avrà bisogno per avere successo in questa posizione, incluse competenze, qualifiche ed esperienza.The role requires 3+ years of ASIC PD experience on 3/5/7nm, strong RTL to GDSII knowledge, and proficiency with Fusion Compiler, Innovus, Primetime, Calibre, and Redhawk. xysqume #J-18808-LjbffrPer questa posizione sono disponibili opzioni di lavoro a distanza/a casa.
📌 Soc Physical Design Engineer — Hybrid, Cutting-Edge Asic (Macerata)
🏢 Nokia
📍 Macerata